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 FQD3N60C
January 2006
QFET
FQD3N60C
600V N-Channel MOSFET Features
* 2.4A, 600V, RDS(on) = 3.4 @VGS = 10 V * Low gate charge ( typical 10.5 nC) * Low Crss ( typical 5 pF) * Fast switching * 100% avalanche tested * Improved dv/dt capability
TM
Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switched mode power supplies, active power factor correction, electronic lamp ballasts based on half bridge topology.
D
D
G
S
D-PAK
FQD Series
G
S
Absolute Maximum Ratings
Symbol
VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL Drain-Source Voltage Drain Current Drain Current Gate-Source voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25C) - Derate above 25C
(Note 2) (Note 1) (Note 1) (Note 3)
Parameter
- Continuous (TC = 25C) - Continuous (TC = 100C) - Pulsed
(Note 1)
FQD3N60C
600 2.4 1.5 9.6 30 150 2.4 5.0 4.5 50 0.4 -55 to +150 300
Unit
V A A A V mJ A mJ V/ns W W/C C C
Operating and Storage Temperature Range Maximum Lead Temperature for Soldering Purpose, 1/8" from Case for 5 Seconds
Thermal Characteristics
Symbol
RJC RJA* RJA
Parameter
Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient* Thermal Resistance, Junction-to-Ambient
Typ.
----
Max.
2.5 50 110
Unit
C/W C/W C/W
* When mounted on the minimum pad size recommended (PCB Mount)
(c)2006 Fairchild Semiconductor Corporation
1
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FQD3N60C REV. A
600V N-Channel MOSFET
Package Marking and Ordering Information
Device Marking
FQD3N60C FQD3N60C
Device
FQD3N60CTM FQD3N60CTF
Package
D-PAK D-PAK
TC = 25C unless otherwise noted
Reel Size
380mm 380mm
Tape Width
16mm 16mm
Quantity
2500 2000
Electrical Characteristics
Symbol
Off Characteristics BVDSS BVDSS / TJ IDSS IGSSF IGSSR VGS(th) RDS(on) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS ISM VSD trr Qrr
NOTES:
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
Conditions
VGS = 0V, ID = 250A ID = 250A, Referenced to 25C VDS = 600V, VGS = 0V VDS = 480V, TC = 125C VGS = 30V, VDS = 0V VGS = -30V, VDS = 0V VDS = VGS, ID = 250A VGS = 10V, ID = 1.2A VDS = 40V, ID = 1.2A VDS = 25V, VGS = 0V, f = 1.0MHz
(Note 4)
Min.
600 -----2.0 ------
Typ.
-0.6 -----2.8 3.5 435 45 5 12 30 35 35 10.5 2.1 4.5
Max Units
--1 10 100 -100 4.0 3.4 -565 60 8 34 70 80 80 14 --V V/C A A nA nA V S pF pF pF ns ns ns ns nC nC nC
On Characteristics
Dynamic Characteristics
Switching Characteristics VDD = 300V, ID = 3A RG = 25
(Note 4, 5)
------(Note 4, 5)
VDS = 480V, ID = 3A VGS = 10V
--
Drain-Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = 2.4A VGS = 0V, IS = 3A dIF/dt =100A/s
(Note 4)
------
---260 1.6
3 12 1.4 ---
A A V ns C
1. Repetitive Rating: Pulse width limited by maximum junction temperature 2. IAS = 2.4A, VDD = 50V, L=47mH, RG = 25, Starting TJ = 25C 3. ISD 3A, di/dt 200A/s, VDD BVDSS, Starting TJ = 25C 4. Pulse Test: Pulse width 300s, Duty Cycle 2% 5. Essentially Independent of Operating Temperature Typical Characteristics
600V N-Channel MOSFET REV. A
2
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600V N-Channel MOSFET
Typical Performance Characteristics
Figure 1. On-Region Characteristics
10
1
Figure 2. Transfer Characteristics
10
1
ID, Drain Current [A]
10
0
ID, Drain Current [A]
VGS Top : 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V Bottom : 5.0 V
150 C 25 C -55 C
Notes : 1. VDS = 40V 2. 250 s Pulse Test
o o
o
Notes : 1. 250 s Pulse Test 2. TC = 25
10
-1
10
0
10
1
10
0
2
4
6
8
10
VDS, Drain-Source Voltage [V]
VGS, Gate-Source Voltage [V]
Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature
12
10
1
RDS(ON) [ ], Drain-Source On-Resistance
8
6
VGS = 10V
IDR, Reverse Drain Current [A]
10
10
0
150 25
Notes : 1. VGS = 0V 2. 250 s Pulse Test
4
VGS = 20V
2
Note : TJ = 25
0
0
1
2
3
4
5
6
7
10
-1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
ID, Drain Current [A]
VSD, Source-Drain voltage [V]
Figure 5. Capacitance Characteristics
12
800 700 600
C iss = C gs + C gd (C ds = shorted) C oss = C ds + C gd C rss = C gd
Figure 6. Gate Charge Characteristics
Coss Ciss
VGS, Gate-Source Voltage [V]
10
VDS = 120V VDS = 300V VDS = 480V
8
Capacitances [pF]
500 400 300 200 100 0 -1 10
6
4
Crss
Note ; 1. VGS = 0 V 2. f = 1 MHz
2
Note : ID = 10A
0
10
0
10
1
0
2
4
6
8
10
12
V DS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
600V N-Channel MOSFET REV. A
3
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600V N-Channel MOSFET
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation vs. Temperature
1.2
Figure 8. On-Resistance Variation vs. Temperature
3.0
BVDSS, (Normalized) Drain-Source Breakdown Voltage
RDS(ON), (Normalized) Drain-Source On-Resistance
2.5
1.1
2.0
1.0
1.5
0.9
Notes :
1.0
Notes :
1. VGS = 0 V 2. ID = 250 A
0.5
1. VGS = 10 V 2. ID = 1.2 A
0.8 -100
-50
0
50
100
o
150
200
0.0 -100
-50
0
50
100
o
150
200
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current vs. Case Temperature
2.5
Operation in This Area is Limited by R DS(on)
10
1
2.0
ID, Drain Current [A]
1 ms
10
0
ID, Drain Current [A]
100 s 10 ms DC
10 s
1.5
1.0
10
-1
Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse
o o
0.5
10
-2
10
0
0.0 25
50
75
100
125
150
VDS, Drain-Source Voltage [V]
TC, Case Temperature [ ]
Figure 11. Transient Thermal Response Curve
Z JC(t), Thermal Response
10
0
D = 0 .5 0 .2 0 .1 0 .0 5
N o te s : 1 . Z J C ( t) = 2 .5 /W M a x . 2 . D u ty F a c to r , D = t 1 /t 2 3 . T J M - T C = P D M * Z J C ( t)
10
-1
0 .0 2 0 .0 1 s in g le p u ls e
PDM t1 t2
10
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ]
600V N-Channel MOSFET REV. A
4
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600V N-Channel MOSFET
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
600V N-Channel MOSFET REV. A
5
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600V N-Channel MOSFET
Peak Diode Recovery dv/dt Test Circuit & Waveforms
600V N-Channel MOSFET REV. A
6
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600V N-Channel MOSFET
Mechanical Dimensions
D-PAK
Dimensions in Millimeters
600V N-Channel MOSFET REV. A
7
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TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM FAST(R) ActiveArrayTM FASTrTM BottomlessTM FPSTM Build it NowTM FRFETTM CoolFETTM GlobalOptoisolatorTM CROSSVOLTTM GTOTM DOMETM HiSeCTM EcoSPARKTM I2CTM E2CMOSTM i-LoTM EnSignaTM ImpliedDisconnectTM FACTTM IntelliMAXTM FACT Quiet SeriesTM Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM
DISCLAIMER
ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANARTM PACMANTM POPTM Power247TM PowerEdgeTM
PowerSaverTM PowerTrench(R) QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM ScalarPumpTM SILENT SWITCHER(R) SMART STARTTM SPMTM StealthTM SuperFETTM SuperSOTTM-3
SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TCMTM TinyLogic(R) TINYOPTOTM TruTranslationTM UHCTM UltraFET(R) UniFETTM VCXTM WireTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I18


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